[0.1.x] fixed : not integer regsiter not supported now

git-svn-id: https://pykd.svn.codeplex.com/svn@73535 9b283d60-5439-405e-af05-b73fd8c4d996
This commit is contained in:
SND\kernelnet_cp 2012-01-24 06:41:36 +00:00 committed by Mikhail I. Izmestev
parent fc083db186
commit 3902000ae8
3 changed files with 85 additions and 30 deletions

View File

@ -16,7 +16,32 @@ CpuReg::CpuReg( IDebugClient4 *client, const std::string &regName ) :
hres = m_registers->GetIndexByName( m_name.c_str(), &m_index );
if ( FAILED( hres ) )
throw DbgException( "IDebugRegister::GetIndexByName", hres );
throw DbgException( "IDebugRegister::GetIndexByName", hres );
DEBUG_REGISTER_DESCRIPTION desc = {};
hres =
m_registers->GetDescription(
m_index,
NULL,
0,
NULL,
&desc );
if ( FAILED( hres ) )
throw DbgException( "IDebugRegister::GetDescription", hres );
switch ( desc.Type )
{
case DEBUG_VALUE_INT8:
case DEBUG_VALUE_INT16:
case DEBUG_VALUE_INT32:
case DEBUG_VALUE_INT64:
break;
default:
throw DbgException( "Unsupported register type ( not integer )" );
}
}
///////////////////////////////////////////////////////////////////////////////////
@ -42,6 +67,7 @@ CpuReg::CpuReg( IDebugClient4 *client, ULONG index ) :
throw DbgException( "IDebugRegister::GetDescription", hres );
std::vector<char> nameBuffer(nameSize);
DEBUG_REGISTER_DESCRIPTION desc = {};
hres =
m_registers->GetDescription(
@ -49,11 +75,23 @@ CpuReg::CpuReg( IDebugClient4 *client, ULONG index ) :
&nameBuffer[0],
nameSize,
NULL,
NULL );
&desc );
if ( FAILED( hres ) )
throw DbgException( "IDebugRegister::GetDescription", hres );
switch ( desc.Type )
{
case DEBUG_VALUE_INT8:
case DEBUG_VALUE_INT16:
case DEBUG_VALUE_INT32:
case DEBUG_VALUE_INT64:
break;
default:
throw DbgException( "Unsupported register type ( not integer )" );
}
m_name = std::string( &nameBuffer[0] );
}

View File

@ -169,4 +169,5 @@ class IntBaseTest( unittest.TestCase ):
def testConvert( self ):
self.assertEqual( "100", "%d" % intBase(100) )
self.assertEqual( "64", "%x" % intBase(100) )

View File

@ -1,34 +1,50 @@
#import unittest
#import pykd
#import target
import unittest
import target
import pykd
#class CpuRegTest( unittest.TestCase ):
# def testBasic(self):
# try:
# reg = pykd.cpuReg(0)
# self.assertTrue(True)
# except pykd.BaseException:
# pass
class CpuRegTest( unittest.TestCase ):
# def testGPR(self):
def testCtor(self):
if pykd.is64bitSystem():
pykd.reg("rax")
else:
pykd.reg("eax")
pykd.reg( 0 )
def testFormat(self):
self.assertEqual( "%d" % int(pykd.reg(0)), "%d" % pykd.reg(0) )
self.assertEqual( "%x" % int(pykd.reg(0)), "%x" % pykd.reg(0) )
def testGpr(self):
if pykd.is64bitSystem():
pykd.reg("rax")
pykd.reg("rbx")
pykd.reg("rcx")
pykd.reg("rdx")
pykd.reg("rdi")
pykd.reg("rsi")
pykd.reg("rbp")
pykd.reg("rsp")
pykd.reg("rip")
else:
pykd.reg("eax")
pykd.reg("ebx")
pykd.reg("ecx")
pykd.reg("edx")
pykd.reg("edi")
pykd.reg("esi")
pykd.reg("ebp")
pykd.reg("esp")
pykd.reg("eip")
# if pykd.is64bitSystem():
def testFloatRegister(self):
"TODO: support float point regsiters"
self.assertRaises( pykd.BaseException, pykd.reg, "st0" )
# rax = pykd.cpuReg("rax")
# self.assertEqual( rax, pykd.reg("rax") )
# rip = pykd.cpuReg("rip")
# self.assertEqual( rip, pykd.reg("rip") )
def testMmxRegister(self):
"TODO: support MMX regsiters"
self.assertRaises( pykd.BaseException, pykd.reg, "mmx0" )
# else:
# eax = pykd.cpuReg("eax")
# self.assertEqual( eax, pykd.reg("eax") )
# eip = pykd.cpuReg("eip")
# self.assertEqual( eip, pykd.reg("eip") )